Internship - Develop Indago flow for RISC-V CPUs - 3 months - Paris, France

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What we do
 
Melexis engineers microelectronic solutions. These solutions facilitate the work of our customers. By easy integration. By taking innovation one step further. By providing a competitive advantage. Our technology makes cars and other products smarter, safer and greener. Our sensors capture data from the analog world and comprehend these data digitally. Our drivers make sure customers can bring their products to life. As we always have a plan, we come with the right products at the right moment so our customers stay one step ahead of the competition. That’s what we call inspired engineering.
 
Who we work for
 
We mainly focus on semiconductors for the automotive industry. Melexis is energizing the transition to Electrical Vehicles (EVs). We increase the efficiency of Internal Combustion Engine (ICE) cars. Besides the automotive market, we cater to other markets as well.

How we make the difference
 
Our people are and make the difference. Melexis creates a framework for colleagues to grow, thrive and create impact for themselves, the customer and the company. Because we care, we empower and we excel. We believe in the power of diversity. Spread over 3 continents, 1900 colleagues from 50 nationalities shape the best imaginable future.


Project Description

As an intern at Melexis, you will contribute to the integration of advanced debugging tools into our cutting-edge
RISC-V CPU platform.

More specifically, you will:

● Participate in configuring the Indago debugging tool for the RISC-V CPU architecture.
● Integrate Indago into our digital design flow, ensuring compatibility with existing tools.
● Explore the functionalities of Indago, including register visualization, assembly and C code execution tracking,
and memory management.
● Backport the Indago integration to our existing homemade CPU platforms.


Expected results

  • Successful integration of the Indago tool into the RISC-V digital flow.
  • Backport of tool enhancements to legacy CPU architectures

Requirements

  • Currently pursuing a Master’s degree in Electrical Engineering or related field (Master 1 level)
  • Basic knowledge of RTL coding (Verilog and/or VHDL)
  • Basic programming skills, with some experience in Makefile, Python, and TCL

We offer

Joining Melexis for your internship is the opportunity to build up your know-how in a high-tech, international and dynamic company, benefit from the experience and training of our experts and enjoy the welcoming and friendly atmosphere of our Paris office team which is specialized in Digital Design and counts 20 employees.

Facts and Figures

  • Working Hours per Week

    35

  • Business Travel Required

    Yes, according to position accountabilities

  • Work Permit Required

    Yes

  • Working in Shift Required

    No